IO pad Library
Krivi brings decades of ESD and IO design experience to provide best-in-class IO pad library. In-house IO library development and verification software along with silicon proven IO circuits enables us to develop IO pad library for customized or generic requirements in quick time. Our IO pad occupies lesser area and power than most of the available libraries saving cost in production runs.
We are eco-system partner with UMC to develop entire suit of Alcor specialty IO libraries. You can avail our silicon proven library for your next PHY and SoC designs in UMC28HLP and HPC processes. This Alcor platform provides IO pad libraries for DDR4/3 (3.2Gbps), LPDDR3/2, HSTL, RLDRAM-3, LVDS (2Gbps), subLVDS, UHS-II, SLVS, SD IO, eMMC, ONFI, 3.3v (using 1.8v transistor) and wide-range (1.2-3.3v) GPIO.
Customized IO Pad Library
Foundry provided IO libraries are often not optimized to give best area optimization for your SoC. We have years of experience to optimize ESD and IO library to provide most suitable library solution for chip. Here are some of the examples of our customized IO solution:
- low leakage GPIO for IoT ASICs
- multi function IO cell combing REFE, SDIO, LPDDR1, RBDB standards with 40% area saving over foundry IO
- Drive strength and ESD optimized DDR IO library providing 50% IO ring area saving over foundry IO
Similarly we also provide ONFI and NV-DDRn libraries requiring back-ward compatibility with 3.3v using thinner 1.8v gate oxide devices. We are a trusted IO pad library vendor for some of the top-20 semiconductor companies.