Reconfigurable IP


EFLX system View


Add runtime reconfigurable logic to a SoC with Flex Logix’s patented EFLX embedded reconfigurable logic cores. The logic blocks are supplied as silicon proven hard macros that are placed and wired to the rest of the SoC. For additional capacity the logic blocks can combine to form an array of logic blocks, DSP logic blocks and external memory can be added.

Whilst it is clear that reconfigurable logic is never going to be as efficient as custom hardwired logic, in trials EFLX has proven to be speed, area and power efficient. Flex Logix also supply the software to port synthesised RTL to the EFLX bit stream that programs the logic block(s). The EFLX logic blocks are programed with the bit stream at boot time and when the block needs to be reconfigured.

Applications for reconfigurable logic:

  • Implementing early stage standards that may need changing before ratification
  • Implementing algorithms that may need to be optimised
  • Implementing specific algorithms that are only used in specific user modes
  • Adding custom specific features on the same physical silicon die
  • DSP acceleration
  • Implementing the digital side of Phy interfaces
  • Intelligent reconfigurable IO

For more information or a demonstration, please contact us.